The SLink_31048_X is a high-performance L1+ ultra-low latency switch developed by Shengli Technologies specifically for the financial industry. Integrating the CrossPoint architecture with FPGA programmable technology, it has been developed for a variety of specialized applications targeting quantitative trading and high-concurrency market data processing scenarios.
The device utilizes an industry-leading FPGA chip solution and integrates multiple core functions: L1 data forwarding, picosecond-level high-precision timing, multi-group data aggregation, data filtering and isolation, and market data aggregation, fully meeting the financial sector's demand for extreme latency. Through hardware architecture innovation and software function customization, this product provides financial customers with a complete solution from nanosecond-level latency control to high-concurrency data processing. It is particularly suitable for time-sensitive core business scenarios such as low-latency trading and high-frequency market data analysis.
Built-in industry-leading FPGA chip
It has an industry-leading built-in Xilinx Virtex® UltraScale™ VU9P high performance FPGA chip
High bandwidth and large cache
Supporting up to 48 10G SFP+ ports, the selection of high-performance on-chip cache and high-bandwidth off-chip storage tailored to specific application characteristics. This meets the ultra-low latency and high throughput requirements of in high-frequency trading scenarios needed by brokerages, hedge funds, exchanges, and trading firms.
High precision clock
The switch's master clock can be selected from either an OCXO or Atomic source, ensuring a stable, high-precision clock even without an external clock source. Combined with Shengli Technologies’unique sampling and timing algorithms, it provides picosecond-level timestamp functionality, ensuring accurate capture time and the timeliness and accuracy of data analysis.
The SLink_31048_X low-latency switch supports three external clock synchronization methods, providing users with flexible time sync.
Support NTP clock synchronization
Support PTP clock synchronization
Support 1PPS input/output interface


