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Product
PictureModelData ChannelLatency(ns)Supported Data RateCharacteristicsWeight
SLink_31048_X48 PortLayer1:2-4
Mux:36-45
Access:86-107		1G/10GSingle FPGA Core Design：Configurable with Xilinx or domestic FPGA cores；Optional OCXO/Atomic Clock timebase；Pre-integrated with multiple application modules。9.63kg
SLink_33048_H48 portLayer1:2-41G/10GDual FPGA Core Design：Xilinx or domestic FPGA cores selectable；OCXO/Atomic Clock timebase optional；Supports up to 128GB memory in NodeWatch mode。10.2kg
SLink_34048_H48 PortLayer1:2-41G/10GDual FPGA Core Design：Xilinx or domestic FPGA cores selectable；OCXO/Atomic Clock timebase optional；Run 2 apps concurrently on separate cores。9.63kg

Supported Apps

AppIconFunction Introduction
NodeWatchNetwork Monitoring Application; Real-time and high-precision timestamping function for network packets;Picosecond (Ps) level timestamp; supports NTP/PTP time synchronization; supports timekeeping via an internal atomic clock or an external PPS (Pulse Per Second) signal.
NodeMuxUltra-low Latency Multi-channel Data Aggregation and Distribution Application: Ultra-low Latency Aggregation: The latency for multi-channel aggregation of Ethernet frames can be as low as 40ns, offering extremely strong real-time performance; Large MTU Support: The MTU can reach up to 9600.
NodeAccessMux supports downstream ACL filtering applications on its basis: Multi-channel support: Based on the Mux architecture, each channel can operate independently; Rich instruction set: Each channel supports 16 sets of ACL instruction sets, flexibly adapting to diverse requirements; Deep filtering: The instruction set supports MAC layer, protocol layer, and TCP/IP layer filtering, providing precise control over data.